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Rapidus, University of Tokyo plan 1-nm chip tech with French partner

Japanese chipmaker Rapidus and the University of Tokyo are partnering with French research institute Leti to jointly develop basic technology for designing chips using technology in the 1-nanometer range.

The partners will begin actively exchanging staff and sharing technology as early as next year. Leti will contribute its expertise in chip components to build an infrastructure for supplying 1-nm products.

Rapidus is already collaborating with IBM and Belgian research and development group Imec to realize the goal of mass-producing 2-nm chips in 2027. It is estimated that 1-nm semiconductors will enter the mainstream as soon as the 2030s.

Compared to 2-nm, 1-nm technology would boost power efficiency and computational performance by 10% to 20%. IBM is considering a collaboration in the 1-nm space as well.

A cross-border partnership spanning Japan, the U.S. and Europe is expected to lead to stable supply chains for the next-generation chips.

Last year, Rapidus, the University of Tokyo and other Japanese national universities joined with the country's Riken research institute to form the Leading-Edge Semiconductor Technology Center (LSTC). In October, the LSTC signed a memorandum of understanding with Leti to explore a collaboration.

LSTC and Leti look to establish basic technology needed to design semiconductors made with 1.4-nm-to-1-nm processes. Different transistor structures are required to make 1-nm products, and within that field, Leti is strong in film deposition and similar technology.

Leti has taken the lead in researching new transistor structures, while LSTC will cooperate in evaluating and testing prototypes, as well as in dispatching personnel.

With conventional chip component structures, miniaturization that goes past a certain level degrades power efficiency and limits the scope of improving performance. Japan possesses no homegrown know-how in design development of semiconductors in the 1-nm range.

In that light, Rapidus and other Japanese stakeholders envision building relationships with research institutes and companies overseas through joint research and to import 1-nm design technology. Rapidus was formed last year with the backing of the Japanese government to revive the domestic chip industry.

In the early 2000s, Japan launched multiple national semiconductor projects geared toward developing miniaturization tech, but all failed to produce meaningful results. Large Japanese electronics manufacturers pulled out of developing advanced chips due to the large cost burden.

As of now, Japanese companies are only capable of manufacturing semiconductors with 40-nm processes.

The global semiconductor market is on track to reach $1 trillion by 2030, according to McKinsey & Co., up from the roughly $600 billion in 2021. Nations are competing intensely to mass-produce advanced chips.

Worldwide leaders Samsung Electronics and Taiwan Semiconductor Manufacturing Co. are due to mass-produce semiconductors with 2-nm technology in 2025. Intel, which makes 4-nm products, plans to start manufacturing chips with the 1.8-nm process next year.

Rapidus will start up a pilot production line for making 2-nm products in April 2025. The company intends to mass-produce the semiconductors in Hokkaido in 2027.

Rapidus was formed in August last year though a 7.3 billion-yen ($48.5 million) investment from eight Japanese companies, including Toyota Motor and NTT. The Ministry of Economy, Trade and Industry is extending 330 billion yen in subsidies to Rapidus. 

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